vishay siliconix dg3537/3538/3539/3540 document number: 73320 s-70853-rev. c, 30-apr-07 www.vishay.com 1 4- , 360-mhz, dual spst analog switches features ? 1.8 v to 5.5 v operation ?3 at 2.7 v r on ? 360 mhz - 3 db bandwidth ? esd method 3015.7 > 2 kv ? latch-up current 0.300 ma (jesd 78) ? 1.6 v logic compatible benefits ? space saving micro foot ? package ? high linearity ? low power consumption ? high bandwidth ? full rail signal swing range applications ? cellular phones ?mp3 ? media players ? modems ? hard drives ? pcmcia description the dg3537/3538/3539/3540 are dual spst analog switches which operate from 1.8 v to 5.5 v single rail power supply. they are design for audio, video, and usb switching applications. the devices have 4 on-resistance and 360 mhz 3 db bandwidth. 0.2 on-resistance matching and 1 flatness make the device high linearity. the devices are 1.6 v logic compatible within the full operation voltage range. these switches are built on a sub-micron high density process that brings low power consumption and low voltage performance. the switches are packaged in micro foot chip scale package of 3 x 3 bump array. as a committed partner to the community and environment, vishay siliconix manufactures this product with the lead (pb)-free device termination s. for micro foot analog switch products manufactur ed with tin/silver/copper (snagcu) device termination, the lead (pb)-free "-e1" suffix is being used as a designator. functional block diagram and pin configuration com 2 no 2 in 1 dg3537 micro foot 8-bump no 2 no 1 gnd v+ in 2 gnd 1 a 23 b c top view bumps down com 1 v+ no 1 in 2 in 1 com 2 com 1 xxx 3537 a1 locator 3537 = device marking xxx = data/lot traceability code device marking rohs compliant
www.vishay.com 2 document number: 73320 s-70853-rev. c, 30-apr-07 vishay siliconix dg3537/3538/3539/3540 functional block diagram and pin configuration com 2 nc 2 in 1 dg3538 micro foot 8-bump nc 2 nc 1 gnd v+ xxx 3538 a1 locator 3538 = device marking xxx = data/lot traceability code in 2 gnd 1 a 23 b c top view bumps down com 1 v+ nc 1 in 2 in 1 com 2 com 1 device marking com 2 nc 2 in 1 dg3539 micro foot 8-bump nc 2 no 1 gnd v+ xxx 3539 a1 locator 3539 = device marking xxx = data/lot traceability code in 2 gnd 1 a 23 b c top view bumps down com 1 v+ no 1 in 2 in 1 com 2 com 1 device marking com 1 no 1 in 2 dg3540 micro foot 8-bump no 2 no 1 gnd v+ xxx 3540 a1 locator 3540 = device marking xxx = data/lot traceability code in 1 v+ 1 a 23 b c top view bumps down com 2 gnd no 2 in 2 in 1 com 2 com 1 device marking truth table logic nc1 and nc2 no1 and no2 0 on off 1offon ordering information temp range package part number - 40 to 85 c micro foot: 8 bump (3 x 3, 0.5 mm pitch, 238 m bump height) dg3537db-t5-e1 dg3538db-t5-e1 dg3539db-t5-e1 DG3540DB-T1-E1
document number: 73320 s-70853-rev. c, 30-apr-07 www.vishay.com 3 vishay siliconix dg3537/3538/3539/3540 notes: a. signals on nc, no, or com or in exceeding v+ will be clamped by internal diodes. limit forward diode current to maximum curr ent ratings. b. refer to ipc/jedec (j-std-020b) c. all bumps welded or soldered to pc board. d. derate 5.0 mw/c above 70 c. stresses beyond those listed under ?absolute maximum ratings? may cause permanent damage to the device. these are stress rating s only, and functional operation of the device at these or any other conditions beyond those indi cated in the operational sections of the specifications is not implied. exposure to absolute maximum rating conditions for extended per iods may affect device reliability. absolute maximum ratings parameter limit unit reference v+ to gnd - 0.3 to + 6 v in, com, nc, no a - 0.3 to (v+ + 0.3 v) continuous current (no, nc, com) 100 ma peak current (pulsed at 1 ms, 10 % duty cycle) 200 storage temperature (d suffix) - 65 to 150 c package solder reflow conditions b ir/convection 250 esd per method 3015.7 > 2 kv power dissipation (packages) c micro foot: 8 bump (3 x 3 mm) d 400 mw specifications (v+ = 3 v) parameter symbol test conditions otherwise unless specified v+ = 2.7 to 3.6 v, v in = 0.5 v or 1.4 v e temp a limits - 40 to 85 c unit min b typ c max b analog switch analog signal range d v no , v nc , v com full 0 v+ v on-resistance d r on v+ = 2.7 v, v com = 0.2/1.5 v i no , i nc = 10 ma room full 34 4.3 r on flatness d r on flatness room 0.75 1.2 on-resistance match between channels d r ds(on) room 0.25 switch off leakage current f i no(off) i nc(off) v+ = 3.6 v, v no , v nc = 0.3 v/3.3 v, v com = 3.3 v/0.3 v room full - 2 - 20 2 20 na i com(off) room full - 2 - 20 2 20 channel-on leakage current f i com(on) v+ = 3.6 v, v no , v nc = v com = 0.3 v/3.3 v room full - 2 - 20 2 20 digital control input high voltage d v inh full 1.4 v input low voltage v inl full 0.5 input capacitance c in full 8 pf input current f i inl or i inh v in = 0 or v+ full 1 1 a
www.vishay.com 4 document number: 73320 s-70853-rev. c, 30-apr-07 vishay siliconix dg3537/3538/3539/3540 specifications (v+ = 3 v) parameter symbol test conditions otherwise unless specified v+ = 2.7 to 3.6 v, v in = 0.5 v or 1.4 v e temp a limits - 40 to 85 c unit min b typ c max b dynamic characteristics tu r n - o n t i m e t on v+ = 2.7 v, v no or v nc = 1.5 v r l = 300 , c l = 35 pf room full 16 46 48 ns turn-off time t off room full 737 39 charge injection d q inj c l = 1 nf, v gen = 2 v, r gen = 0 room 1 pc off-isolation d oirr r l = 50 , c l = 5 pf, f = 1 mhz room - 78.5 db crosstalk d x ta l k room - 113 off-isolation d oirr r l = 50 , c l = 5 pf, f = 10 mhz room - 58 crosstalk d x ta l k room - 66 off capacitance d c no/nc(off) v in = 0 or v+, f = 1 mhz room 8 pf c com(off) room 14 channel-on capacitance d c no/nc(on) room 27 c com(on) room 27 power supply power supply current i+ v in = 0 or v+ room full 0.001 1.0 1.0 a
document number: 73320 s-70853-rev. c, 30-apr-07 www.vishay.com 5 vishay siliconix dg3537/3538/3539/3540 notes: a. room = 25 c, full = as determined by the operating suffix. b. typical values are for design aid only, not guaranteed nor subject to production testing. c. the algebraic convention whereby the most negative value is a minimum and the most positive a maximum, is used in this data sheet. d. guarantee by design, nor subjected to production test. e. v in = input voltage to perform proper function. f. guaranteed by 5 v leakage testing, not production tested. specifications (v+ = 5 v) parameter symbol test conditions otherwise unless specified v+ = 4.2 to 5.5 v, v in = 0.8 v or 2.0 v e temp a limits - 40 to 85 c unit min b typ c max b analog switch analog signal range d v no , v nc , v com full 0 v+ v on-resistance d r on v+ = 4.2 v, v com = 0.5/3.5 v i no , i nc = 10 ma room full 2.6 3.5 3.7 r on flatness d r on flatness room 0.8 1.2 on-resistance match between channels d r ds(on) room 0.2 switch off leakage current i no(off) i nc(off) v+ = 5.5 v, v no , v nc = 1.0 v/4.5 v, v com = 4.5 v/1.0 v room full - 2 - 20 2 20 na i com(off) room full - 2 - 20 2 20 channel-on leakage current i com(on) v+ = 5.5 v, v no , v nc = v com = 1.0 v/4.5 v room full - 2 - 20 2 20 digital control input high voltage d v inh full 2.0 v input low voltage v inl full 0.8 input capacitance c in full 8 pf input current i inl or i inh v in = 0 or v+ full 1 1 a dynamic characteristics tu r n - o n t i m e t on v+ = 4.2 v, v no or v nc = 3.0 v r l = 300 , c l = 35 pf room full 11 41 43 ns turn-off time t off room full 737 39 charge injection d q inj c l = 1 nf, v gen = 2 v, r gen = 0 room 1 pc off capacitance d c no/nc(off) v in = 0 or v+, f = 1 mhz room 8 pf c com(off) room 14 channel-on capacitance d c no/nc(on) room 28 c com(on) room 28 power supply power supply current i+ v in = 0 or v+ room full 0.001 1.0 1.0 a
www.vishay.com 6 document number: 73320 s-70853-rev. c, 30-apr-07 vishay siliconix dg3537/3538/3539/3540 typical characteristics 25 c, unless otherwise noted r on vs. v com and supply voltage 0.0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 5.0 5.5 6.0 0123456 v com - analog voltage (v) - on-resistance ( ) r on t = 25 c i s = 10 ma v+ = 1.8 v v+ = 2.7 v v+ = 3.0 v v+ = 3.6 v v+ = 4.2 v v+ = 5.0 v v+ = 5.5 v v+ = 2.0 v r on vs. analog voltage and temperature supply current vs. temperature 0 1 2 3 4 5 0.0 0.5 1.0 1.5 2.0 2.5 3.0 v com - analog voltage (v) - on-resistance ( ) r on v+ = 2.7 v i s = 10 ma 85 c 25 c 40 c - - 60 - 40 - 20 0 20 40 60 80 100 10 10000 100000 100 1000 i+ - supply current (na) temperature (c) v+ = 3.0 v v in = 0 v r on vs. analog voltage and temperature supply current vs. input switching frequency 0.0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 012345 v com - analog voltage (v) - on-resistance ( ) r on v+ = 4.2 v i s = 10 ma 85 c 25 c - 40 c 10 10 k 100 k 10 m 100 1 k 1 m 10 ma 1 ma 100 a 10 a 1 a 10 na 100 pa i+ - supply current (a) 1 na 100 na input switching frequency (hz) v+ = 3 v
document number: 73320 s-70853-rev. c, 30-apr-07 www.vishay.com 7 vishay siliconix dg3537/3538/3539/3540 typical characteristics 25 c, unless otherwise noted leakage current vs. temperature switching time vs. temperature switching threshold vs. supply voltage - 60 - 40 - 20 0 20 40 60 80 100 1 10000 temperature (c) v+ = 3.6 v 100 1000 leakage current (pa) i com(off) i no(off) i nc(off) 10 i com(on) 0 2 4 6 8 10 12 14 16 18 20 - 60 - 40 - 20 0 20 40 60 80 100 / t on - switching t ime (ns) t off t on v+ = 4.2 v t off v+ = 4.2 v temperature (c) t on v+ = 2 v t off v+ = 2 v 0.00 0.25 0.50 0.75 1.00 1.25 1.50 1.75 2.00 123456 v+ - supply voltage (v) - switching threshold (v) v t leakage vs. analog voltage insertion loss, off-isolation, crosstalk vs. frequency charge injection vs. analog voltage - 300 - 250 - 200 - 150 - 100 - 50 0 50 100 150 200 250 300 0.0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 v com , v no , v nc - analog voltage (v) leakage current (pa) v+ = 3.6 v i com(on) i com(off) i no(off) , i nc(off) 100 k - 120 10 m 10 - 70 - 50 100 m 1 g 1 m frequency (hz) (db) loss, oirr, x talk - 30 - 10 v+ = 3.0 v r l = 50 0 - 60 - 40 - 20 - 90 - 80 oirr x ta l k loss - 100 - 110 -10 -8 -6 -4 -2 0 2 4 6 8 10 012345 v com - analog voltage (v) q - charge injection (pc) v+ = 3.0 v v+ = 5.0 v v+ = 2.0 v
www.vishay.com 8 document number: 73320 s-70853-rev. c, 30-apr-07 vishay siliconix dg3537/3538/3539/3540 test circuits figure 1. switching time switch input c l (includes fixture and stray capacitance) v+ in no or nc c l 35 pf com logic input r l 300 v out gnd v+ 50 % 0 v logic input switch output t on t off logic "1" = switch on logic input waveforms inverted for switches that have the opposite logic sense. 0 v switch output v out =v noornc r l r l +r on 0.9 x v out t r < 5 ns t f < 5 ns v inh v inl figure 2. charge injection c l = 1 nf r gen v out com v in = 0 - v+ in gnd v+ v+ + nc or no off on on in v out v out q = v out x c l in depends on switch configuration: input polarity determined by sense of switch. figure 3. off-isolation in gnd nc or no 0v, 2.4 v 10 nf com off isolation = 20 log v com v no / nc r l analyzer v+ v+ com figure 4. channel off/on capacitance nc or no f = 1 mhz in com gnd 0 v, 2.4 v meter hp4192a impedance analyzer or equivalent 10 nf v+ v+
document number: 73320 s-70853-rev. c, 30-apr-07 www.vishay.com 9 vishay siliconix dg3537/3538/3539/3540 package outline micro foot: 8 bump (3 x 3, 0.5 mm pitch, 0.238 mm bump height) notes (unless other wise specified): a. bump is lead (pb)-free sn/ag/cu. b. non-solder mask defined copper landing pad. c. laser mark on silicon die back; back-lapped, no coat ing. shown is not actual marking; sample only. notes: a. use millimeters as the primary measurement. vishay siliconix maintains worldwide manufac turing capability. products ma y be manufactured at one of several qualified locatio ns. reliability data for silicon tech- nology and package reliability represent a composite of all qua lified locations. for related documents such as package/tape dra wings, part marking, and reliability data, see http://www.vishay.com/ppg?73320 . index-bump a1 note c top side (die back) xxx 3540 recommended land pattern 0.5 0.5 8 x ? 0.150 0.229 note b solder mask ? pad diameter + 0.1 bump note a 21 a b e d a a 2 a 1 s s e silicon c 3 b diameter e e e dim millimeters a inches min max min max a 0.688 0.753 0.0271 0.0296 a 1 0.218 0.258 0.0086 0.0102 a 2 0.470 0.495 0.0185 0.0195 b 0.306 0.346 0.0120 0.0136 d 1.480 1.520 0.0583 0.0598 e 1.480 1.520 0.0583 0.0598 e 0.5 basic 0.0197 basic s 0.230 0.270 0.0091 0.0106
document number: 91000 www.vishay.com revision: 18-jul-08 1 disclaimer legal disclaimer notice vishay all product specifications and data are subject to change without notice. vishay intertechnology, inc., its affiliates, agents, and employees, and all persons acting on its or their behalf (collectively, ?vishay?), disclaim any and all liability fo r any errors, inaccuracies or incompleteness contained herein or in any other disclosure relating to any product. vishay disclaims any and all li ability arising out of the use or application of any product describ ed herein or of any information provided herein to the maximum extent permit ted by law. the product specifications do not expand or otherwise modify vishay?s terms and conditions of purcha se, including but not limited to the warranty expressed therein, which apply to these products. no license, express or implied, by estoppel or otherwise, to any intellectual property rights is granted by this document or by any conduct of vishay. the products shown herein are not designed for use in medi cal, life-saving, or life-sustaining applications unless otherwise expressly indicated. customers using or selling vishay products not expressly indicated for use in such applications do so entirely at their own risk and agree to fully indemnify vishay for any damages arising or resulting from such use or sale. please contact authorized vishay personnel to obtain written terms and conditions regarding products designed for such applications. product names and markings noted herein may be trademarks of their respective owners.
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